Archelon C for the i960 is designed to provide you with
The Archelon C package includes the AC960 driver program, the ACPP ANSI C preprocessor (with extensions), the CC960 ANSI C compiler, the S960 state-of-the-art instruction scheduler, the AAS960 assembler, the ALD960 linker, the AAR960 object librarian, the ROM960 ROM image builder, COFF file utility programs, and a full ANSI C library (with separate versions for the SA/KA/JX, for the SB/KB/MC, and for the CX/HX).
We use the widely-respected Plum Hall Validation Suite to test conformance to the ANSI standard.
The DOS versions of the package also include a special installation program which makes the job of installation exceptionally simple.
The assembler, linker, librarian, and ROM image builder are built from the GNU tools source code base used by Intel for their 960 products. We have repackaged these tools for our own purposes and we support them as if they were our own. These tools are covered by the GNU General Public Licence, which, among other things, means you can obtain their source code if you so desire.
The driver, preprocessor, compiler, scheduler, and library are our own.
In order to be compatible with the language implemented by Intel's iC960 C compiler, Archelon C supports
Archelon C also supports the following additional features:
Structure Register Variables. Most compilers ignore the keyword register when you try to use it on a structured type. Our compiler is capable of assigning structured types to registers if the structured type meets certain constraints. Each member of the structured type must be either a bit field or a type whose size is 32 bits and which is aligned to a 32 bit boundary within the structured type. The total size of the structured type must be less then or equal to four words. This capability of the compiler can greatly improve the quality of code generated for code which uses small structured types containing bit fields.
Tree Optimizations. In the course of converting each function in your program to an intermediate form, the compiler performs extensive optimizations using pattern matching of trees. To give a few examples:
Common sub-expression elimination. The compiler detects global common sub-expressions using a proprietary algorithm based on nested conditional regions. Unlike most compilers, Archelon C does not restrict itself to the current basic block in finding common sub-expressions. Instead, it can find a common sub-expression in any piece of code which has to be traversed to get to the point where the expression being considered appears.
Register Allocation. The compiler will automatically bind a local variable to a register if its usage count warrants it. Usage counts are biased to give priority to variables used inside loops. Local temporaries are allocated and deallocated on a least recently used basis.
Leaf Functions. If a function uses only a few local variables and if the function makes no calls to subordinate functions, the compiler can usually make it into a leaf function. This means that it can be entered using a simple branch and link instruction, instead of a call instruction. The use of branch and link is much better because it (1) avoids having to save the local registers into the on-chip register set stack and (2) ensures that the on-chip register set stack will not overflow and need to be pushed out to memory.
Tail Call Elimination. If a function calls another function just before returning, the compiler will, in the right circumstances (being that the call does not contain any possible reference to the current stack frame), convert the call/return into a branch to the new function. This avoids having to save an extra set of local registers and makes the call much faster.
Branch Prediction. For the CA, CF, or HX processors, the compiler sets branch prediction bits for branches in loops, using the premise that in general any loop will be executed more than once. This results in setting the true prediction for conditional branches back to the start of a loop and in setting a false prediction for a conditional branch out of or around a loop.
Bit Operations. Recognizing that embedded systems applications tend to make extensive use of bit manipulation, we have taken special care to make sure that the code generator uses the hardware bit manipulation instructions whenever it would be advantageous to do so.
The purpose of the instruction scheduler is to re-order instructions in such a way that the new ordering executes faster than the old.
The optimizations performed by the scheduler will improve the execution speed of your code, no matter which model of the 960 family you are using, but the scheduler will usually obtain the greatest improvement when scheduling for the superscalar CA, CF, HX processors.
For the CA/CF/HX, we have observed that the scheduler can improve execution speed between five and 25 per cent. The actual amount the scheduler can improve your code depends on the length of the basic blocks in your particular application, with the longer being the better.
Although the scheduler is primarily intended for improving compiled code, you can also use it to improve any hand-written assembly code which you might have. The only difference between hand code and compiled code passed to the scheduler is that the compiled code has data dependency information for loads and stores encoded in specially distinguished comments.
Here are some of the ways the scheduler can improve your code:
If you are looking to get the fastest possible compile times during development, you can use a command line option to suppress the invocation of the scheduler, because the code output by the compiler does not have to be passed through the scheduler to run correctly.
The Archelon C compiler can optionally generate full symbolic debugging information using Common Object File Format (COFF) debug tables. You can do symbolic debugging of your Archelon C program using any COFF-based debugger, such as Intel's DB960 or the debugger from Router Engines.
One problem with the standard COFF debug symbolic tables is that there is no straightforward way to deal with an object whose size is greater then 64K bytes. When generating the symbolic debug information for such objects, the Archelon C compiler produces some extra information which can be used by a COFF debugger to obtain the correct size. Currently, the Router Engines debugger is the only one which is capable of using this extra information.
The software package also includes programs to manipulate and/or reformat COFF files. The ROM960 program, which builds ROM images, can convert to Intel hex format. The CVT960 program converts COFF files to the IEEE-695 format.
With Archelon C, you get unlimited telephone technical support. All we ask is that you be reasonable in your requests for support. Although we test our software very thoroughly before shipping, it is still possible that you might encounter an error. If you find a problem which impedes your productive use of the software, it is our standing policy to make our best efforts to ship you an updated, corrected version by overnight express within 48 hours.
The DOS version of the product is a 32 bit version which runs only on 386/486 MS-DOS systems. To run it, you should have at least two megabytes of memory. Because this version can run under either DPMI or VCPI DOS Extenders, it is no problem to run our tools in a DOS Window under Microsoft Windows 3.0 or 3.1. It comes with its own royalty-free DOS extender, which is used if there is no other extender running in the system.
We also have a version for Unix System V/386, which will run on any 386/486 Unix system which supports the AT&T 386 Application Binary Interface (ABI).
Finally, we have two versions for the Sun/SPARC, one for SunOS 4.x.x and one for Solaris 2.x, which are available now.
The software works well with the following OS's:
If you would like to make sure that our software suits your needs, you can ask for an evaluation copy which you can use for up to 60 days. After the evaluation period is over, you can either return the software or remit payment.
The cost per single cpu licence is as follows:
| Product Code | Platform | Cost |
|---|---|---|
| AC960/386 | MS-DOS (32 bit) | US$995 |
| AC960/386U | Unix System V/386 | US$1250 |
To order the product, or to get more information, please contact:
Preston Gurd
You can reach us by email.